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mcp_can_dfs.h
1 /*
2 mcp_can_dfs.h
3 2012 Copyright (c) Seeed Technology Inc. All right reserved.
4
5 Author:Loovee
6 Contributor: Cory J. Fowler
7 2014-1-16
8 This library is free software; you can redistribute it and/or
9 modify it under the terms of the GNU Lesser General Public
10 License as published by the Free Software Foundation; either
11 version 2.1 of the License, or (at your option) any later version.
12
13 This library is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 Lesser General Public License for more details.
17
18 You should have received a copy of the GNU Lesser General Public
19 License along with this library; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-
21 1301 USA
22 */
23 #ifndef _MCP2515DFS_H_
24 #define _MCP2515DFS_H_
25
26 #include <Arduino.h>
27 #include <SPI.h>
28 #include <inttypes.h>
29
30 #ifndef INT32U
31 #define INT32U unsigned long
32 #endif
33
34 #ifndef INT8U
35 #define INT8U byte
36 #endif
37
38 // if print debug information
39 #define DEBUG_MODE 0
40
41 /*
42 * Begin mt
43 */
44 #define TIMEOUTVALUE 50
45 #define MCP_SIDH 0
46 #define MCP_SIDL 1
47 #define MCP_EID8 2
48 #define MCP_EID0 3
49
50 #define MCP_TXB_EXIDE_M 0x08 /* In TXBnSIDL */
51 #define MCP_DLC_MASK 0x0F /* 4 LSBits */
52 #define MCP_RTR_MASK 0x40 /* (1<<6) Bit 6 */
53
54 #define MCP_RXB_RX_ANY 0x60
55 #define MCP_RXB_RX_EXT 0x40
56 #define MCP_RXB_RX_STD 0x20
57 #define MCP_RXB_RX_STDEXT 0x00
58 #define MCP_RXB_RX_MASK 0x60
59 #define MCP_RXB_BUKT_MASK (1<<2)
60
61 /*
62 **Priority values
63 **Can has 3 possible values
64 00 - HIGHEST
65 01 - NEXT
66 10 - LOWEST
67 11-is prohibited
68 */
69
70 #define PRIO_HIGH 0x00
71 #define PRIO_NEXT 0x01
72 #define PRIO_LOW 0x02
73 #define PRIO_MIN_HIGH 0x00
74 #define PRIO_MIN_NORMAL 0x01
75 #define PRIO_MIN_LOW 0x02
76 #define PRIO_MIN_LOWEST 0x03
77
78 /*
79 ** Bits in the TXBnCTRL registers.
80 */
81 #define MCP_TXB_TXBUFE_M 0x80
82 #define MCP_TXB_ABTF_M 0x40
83 #define MCP_TXB_MLOA_M 0x20
84 #define MCP_TXB_TXERR_M 0x10
85 #define MCP_TXB_TXREQ_M 0x08
86 #define MCP_TXB_TXIE_M 0x04
87 #define MCP_TXB_TXP10_M 0x03
88
89 #define MCP_TXB_RTR_M 0x40 /* In TXBnDLC */
90 #define MCP_RXB_IDE_M 0x08 /* In RXBnSIDL */
91 #define MCP_RXB_RTR_M 0x40 /* In RXBnDLC */
92
93 #define MCP_STAT_RXIF_MASK (0x03)
94 #define MCP_STAT_RX0IF (1<<0)
95 #define MCP_STAT_RX1IF (1<<1)
96
97 #define MCP_EFLG_RX1OVR (1<<7)
98 #define MCP_EFLG_RX0OVR (1<<6)
99 #define MCP_EFLG_TXBO (1<<5)
100 #define MCP_EFLG_TXEP (1<<4)
101 #define MCP_EFLG_RXEP (1<<3)
102 #define MCP_EFLG_TXWAR (1<<2)
103 #define MCP_EFLG_RXWAR (1<<1)
104 #define MCP_EFLG_EWARN (1<<0)
105 #define MCP_EFLG_ERRORMASK (0xF8) /* 5 MS-Bits */
106
107
108 /*
109 * Define MCP2515 register addresses
110 */
111
112 #define MCP_RXF0SIDH 0x00
113 #define MCP_RXF0SIDL 0x01
114 #define MCP_RXF0EID8 0x02
115 #define MCP_RXF0EID0 0x03
116 #define MCP_RXF1SIDH 0x04
117 #define MCP_RXF1SIDL 0x05
118 #define MCP_RXF1EID8 0x06
119 #define MCP_RXF1EID0 0x07
120 #define MCP_RXF2SIDH 0x08
121 #define MCP_RXF2SIDL 0x09
122 #define MCP_RXF2EID8 0x0A
123 #define MCP_RXF2EID0 0x0B
124 #define MCP_CANSTAT 0x0E
125 #define MCP_CANCTRL 0x0F
126 #define MCP_RXF3SIDH 0x10
127 #define MCP_RXF3SIDL 0x11
128 #define MCP_RXF3EID8 0x12
129 #define MCP_RXF3EID0 0x13
130 #define MCP_RXF4SIDH 0x14
131 #define MCP_RXF4SIDL 0x15
132 #define MCP_RXF4EID8 0x16
133 #define MCP_RXF4EID0 0x17
134 #define MCP_RXF5SIDH 0x18
135 #define MCP_RXF5SIDL 0x19
136 #define MCP_RXF5EID8 0x1A
137 #define MCP_RXF5EID0 0x1B
138 #define MCP_TEC 0x1C
139 #define MCP_REC 0x1D
140 #define MCP_RXM0SIDH 0x20
141 #define MCP_RXM0SIDL 0x21
142 #define MCP_RXM0EID8 0x22
143 #define MCP_RXM0EID0 0x23
144 #define MCP_RXM1SIDH 0x24
145 #define MCP_RXM1SIDL 0x25
146 #define MCP_RXM1EID8 0x26
147 #define MCP_RXM1EID0 0x27
148 #define MCP_CNF3 0x28
149 #define MCP_CNF2 0x29
150 #define MCP_CNF1 0x2A
151 #define MCP_CANINTE 0x2B
152 #define MCP_CANINTF 0x2C
153 #define MCP_EFLG 0x2D
154 #define MCP_TXB0CTRL 0x30
155 #define MCP_TXB1CTRL 0x40
156 #define MCP_TXB2CTRL 0x50
157 #define MCP_RXB0CTRL 0x60
158 #define MCP_RXB0SIDH 0x61
159 #define MCP_RXB1CTRL 0x70
160 #define MCP_RXB1SIDH 0x71
161
162
163 #define MCP_TX_INT 0x1C // Enable all transmit interrup ts
164 #define MCP_TX01_INT 0x0C // Enable TXB0 and TXB1 interru pts
165 #define MCP_RX_INT 0x03 // Enable receive interrupts
166 #define MCP_NO_INT 0x00 // Disable all interrupts
167
168 #define MCP_TX01_MASK 0x14
169 #define MCP_TX_MASK 0x54
170
171 /*
172 * Define SPI Instruction Set
173 */
174
175 #define MCP_WRITE 0x02
176
177 #define MCP_READ 0x03
178
179 #define MCP_BITMOD 0x05
180
181 #define MCP_LOAD_TX0 0x40
182 #define MCP_LOAD_TX1 0x42
183 #define MCP_LOAD_TX2 0x44
184
185 #define MCP_RTS_TX0 0x81
186 #define MCP_RTS_TX1 0x82
187 #define MCP_RTS_TX2 0x84
188 #define MCP_RTS_ALL 0x87
189
190 #define MCP_READ_RX0 0x90
191 #define MCP_READ_RX1 0x94
192
193 #define MCP_READ_STATUS 0xA0
194
195 #define MCP_RX_STATUS 0xB0
196
197 #define MCP_RESET 0xC0
198
199
200 /*
201 * CANCTRL Register Values
202 */
203
204 #define MODE_NORMAL 0x00
205 #define MODE_SLEEP 0x20
206 #define MODE_LOOPBACK 0x40
207 #define MODE_LISTENONLY 0x60
208 #define MODE_CONFIG 0x80
209 #define MODE_POWERUP 0xE0
210 #define MODE_MASK 0xE0
211 #define ABORT_TX 0x10
212 #define MODE_ONESHOT 0x08
213 #define CLKOUT_ENABLE 0x04
214 #define CLKOUT_DISABLE 0x00
215 #define CLKOUT_PS1 0x00
216 #define CLKOUT_PS2 0x01
217 #define CLKOUT_PS4 0x02
218 #define CLKOUT_PS8 0x03
219
220
221 /*
222 * CNF1 Register Values
223 */
224
225 #define SJW1 0x00
226 #define SJW2 0x40
227 #define SJW3 0x80
228 #define SJW4 0xC0
229
230
231 /*
232 * CNF2 Register Values
233 */
234
235 #define BTLMODE 0x80
236 #define SAMPLE_1X 0x00
237 #define SAMPLE_3X 0x40
238
239
240 /*
241 * CNF3 Register Values
242 */
243
244 #define SOF_ENABLE 0x80
245 #define SOF_DISABLE 0x00
246 #define WAKFIL_ENABLE 0x40
247 #define WAKFIL_DISABLE 0x00
248
249
250 /*
251 * CANINTF Register Bits
252 */
253
254 #define MCP_RX0IF 0x01
255 #define MCP_RX1IF 0x02
256 #define MCP_TX0IF 0x04
257 #define MCP_TX1IF 0x08
258 #define MCP_TX2IF 0x10
259 #define MCP_ERRIF 0x20
260 #define MCP_WAKIF 0x40
261 #define MCP_MERRF 0x80
262
263 /*
264 * speed 16M
265 */
266 #define MCP_16MHz_1000kBPS_CFG1 (0x00)
267 #define MCP_16MHz_1000kBPS_CFG2 (0xD0)
268 #define MCP_16MHz_1000kBPS_CFG3 (0x82)
269
270 #define MCP_16MHz_500kBPS_CFG1 (0x00)
271 #define MCP_16MHz_500kBPS_CFG2 (0xF0)
272 #define MCP_16MHz_500kBPS_CFG3 (0x86)
273
274 #define MCP_16MHz_250kBPS_CFG1 (0x41)
275 #define MCP_16MHz_250kBPS_CFG2 (0xF1)
276 #define MCP_16MHz_250kBPS_CFG3 (0x85)
277
278 #define MCP_16MHz_200kBPS_CFG1 (0x01)
279 #define MCP_16MHz_200kBPS_CFG2 (0xFA)
280 #define MCP_16MHz_200kBPS_CFG3 (0x87)
281
282 #define MCP_16MHz_125kBPS_CFG1 (0x03)
283 #define MCP_16MHz_125kBPS_CFG2 (0xF0)
284 #define MCP_16MHz_125kBPS_CFG3 (0x86)
285
286 #define MCP_16MHz_100kBPS_CFG1 (0x03)
287 #define MCP_16MHz_100kBPS_CFG2 (0xFA)
288 #define MCP_16MHz_100kBPS_CFG3 (0x87)
289
290 #define MCP_16MHz_80kBPS_CFG1 (0x03)
291 #define MCP_16MHz_80kBPS_CFG2 (0xFF)
292 #define MCP_16MHz_80kBPS_CFG3 (0x87)
293
294 #define MCP_16MHz_50kBPS_CFG1 (0x07)
295 #define MCP_16MHz_50kBPS_CFG2 (0xFA)
296 #define MCP_16MHz_50kBPS_CFG3 (0x87)
297
298 #define MCP_16MHz_40kBPS_CFG1 (0x07)
299 #define MCP_16MHz_40kBPS_CFG2 (0xFF)
300 #define MCP_16MHz_40kBPS_CFG3 (0x87)
301
302 #define MCP_16MHz_31k25BPS_CFG1 (0x0F)
303 #define MCP_16MHz_31k25BPS_CFG2 (0xF1)
304 #define MCP_16MHz_31k25BPS_CFG3 (0x85)
305
306 #define MCP_16MHz_20kBPS_CFG1 (0x0F)
307 #define MCP_16MHz_20kBPS_CFG2 (0xFF)
308 #define MCP_16MHz_20kBPS_CFG3 (0x87)
309
310 #define MCP_16MHz_10kBPS_CFG1 (0x1F)
311 #define MCP_16MHz_10kBPS_CFG2 (0xFF)
312 #define MCP_16MHz_10kBPS_CFG3 (0x87)
313
314 #define MCP_16MHz_5kBPS_CFG1 (0x3F)
315 #define MCP_16MHz_5kBPS_CFG2 (0xFF)
316 #define MCP_16MHz_5kBPS_CFG3 (0x87)
317
318
319
320 #define MCPDEBUG (0)
321 #define MCPDEBUG_TXBUF (0)
322 #define MCP_N_TXBUFFERS (3)
323
324 #define MCP_RXBUF_0 (MCP_RXB0SIDH)
325 #define MCP_RXBUF_1 (MCP_RXB1SIDH)
326
327 //#define SPICS 10
328 #define MCP2515_SELECT() digitalWrite(SPICS, LOW)
329 #define MCP2515_UNSELECT() digitalWrite(SPICS, HIGH)
330
331 #define MCP2515_OK (0)
332 #define MCP2515_FAIL (1)
333 #define MCP_ALLTXBUSY (2)
334
335 #define CANDEBUG 1
336
337 #define CANUSELOOP 0
338
339 #define CANSENDTIMEOUT (200) /* milliseconds */
340
341 /*
342 * initial value of gCANAutoProcess
343 */
344 #define CANAUTOPROCESS (1)
345 #define CANAUTOON (1)
346 #define CANAUTOOFF (0)
347
348 #define CAN_STDID (0)
349 #define CAN_EXTID (1)
350
351 #define CANDEFAULTIDENT (0x55CC)
352 #define CANDEFAULTIDENTEXT (CAN_EXTID)
353
354 #define CAN_5KBPS 1
355 #define CAN_10KBPS 2
356 #define CAN_20KBPS 3
357 #define CAN_31K25BPS 4
358 #define CAN_40KBPS 5
359 #define CAN_50KBPS 6
360 #define CAN_80KBPS 7
361 #define CAN_100KBPS 8
362 #define CAN_125KBPS 9
363 #define CAN_200KBPS 10
364 #define CAN_250KBPS 11
365 #define CAN_500KBPS 12
366 #define CAN_1000KBPS 13
367
368 #define CAN_OK (0)
369 #define CAN_FAILINIT (1)
370 #define CAN_FAILTX (2)
371 #define CAN_MSGAVAIL (3)
372 #define CAN_NOMSG (4)
373 #define CAN_CTRLERROR (5)
374 #define CAN_GETTXBFTIMEOUT (6)
375 #define CAN_SENDMSGTIMEOUT (7)
376 #define CAN_FAIL (0xff)
377
378 #define CAN_MAX_CHAR_IN_MESSAGE (8)
379
380 #endif
381 /*********************************************************************************************************
382 END FILE
383 *********************************************************************************************************/